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T
Integrated dual-channel enhanced IDE interface
Supports up to four IDE devices
Supports PIO Mode 4 transfers at up to
14 MB/second
Supports Ultra DMA/33 synchronous DMA mode
transfers up to 33 MB/second
Supports bus master mode with an 8x32-bit buffer
for bus master PCI IDE burst transfers
T
Enhanced DMA controller with two 8237-based DMA
controllers
Supports PCI DMA with three PC/PCI channels and
distributed DMA protocols
Supports fast type-F DMA for reduced PCI bus
usage
T
Interrupt controller based on 82C59
Supports 15 interrupts
Programmable for edge/level sensitivity
T
Power management logic
Sleep/resume logic
Supports thermal alarm
Supports wake-on-modem through Ring Indicate
input
T
Real-time clock
256 byte battery-backed CMOS SRAM
Includes date alarm
System Specifications C-7
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