Card Cage Socket Contact Assignments; Interrupt Lines - NEC Advanced Personal Computer System Reference Manual

Processor PCB
Table 2-1 Card Cage Socket Contact Assignments
PIN
READ/
NUMBER NAME
WRITE DESCRIPTION
Rl, RSO
GND
Signal Ground
LI, LSO
R2, R49 +S V +S Vdc Supply
L2, L49
R3, R48 +12 V
+12 V Supply
L3, L48
R47, L47 -12 V
-12 V Supply
R46, L46 -S V
-S V Supply
R4 POF
W Power Off Control. Goes high to command
power supply off.
RS,LS IRO to
R Interrupt Request
a
Through 14. These IS
R6,L7 IR14
lines carry interrupt requests to the proces-
R8
sor. When an 110 device requires processor
R9,L9
intervention, it signals the jJPD82S9 A inter-
RIO, LIO
rupt controller, which activates one of the IS
R12
interrupt lines to the processor; the interrupt-
request signal is maintained until acknow-
ledgement from the processor. IRO has the
highest priority and IRIS the lowest priority.
These lines are active Low.
R13, R14
DRQO to R DMA Request
a
Through 3. These lines trans-
RlS, R16 DRQ3
mit requests by 110 devices for DMA service.
These signals remain active until DMA
acknowledgement is active on a correspond-
ing DACK line. Channel assignments are 0
=
CRT, 1
=
FDD, 2
=
Graphics, 3
=
AUX.
LI3, LI4
DACKO
W
DMA-Request Acknowledgement
a
Through
LIS, LI6
to DACK3 3. These lines signify that the DMA controller
has acknowledged the DMA request on a
corresponding DRQ line. DACK lines are
active High.
2-4