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Processor PCB
2-18
MASK REGISTER
7
6
5
4
3
2
o -
BIT NUMBER
I I
l ' - - -...... V.___---'
DON'T CARE
I I
'---y--'
L{~!
11
<-..----{
~
SELECT CHANNEL 0 MASK BIT
SELECT CHANNEL 1 MASK BIT
SELECT CHANNEL 2 MASK BIT
SELECT CHANNEL 3 MASK BIT
CLEAR MASK BIT
SET MASK BIT
THE INSTRUCTION, WHICH SEPARATELY SETS OR CLEARS THE MASK BITS, IS SIMILAR IN FORM TO THAT
USED WITH THE REQUEST REGISTER.
7
6
5
4
3
2
o -
BIT NUMBER
I I
I I I
I
L{:
~{:
L - - -_ _ _
{~
L - - -_ _ _ _
{~
CLEAR CHANNEL 0 MASK BIT
SET CHANNEL 0 MASK BIT
CLEAR CHANNEL 1 MASK BIT
SET CHANNEL 1 MASK BIT
CLEAR CHANNEL 2 MASK BIT
SET CHANNEL 2 MASK BIT
CLEAR CHANNEL 3 MASK BIT
SET CHANNEL 3 MASK BIT
ALL FOUR BITS OF THE MASK REGISTER MAY ALSO BE WRITTEN WITH A SINGLE COMMAND.
Figure 2-11 DMA Request and Mask Register (cont'd)
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