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5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Output Ports)
High impedance control
HZR26: 00FF71H•D6
HZR27: 00FF71H•D7
HZR34: 00FF72H•D4 ∗
HZR50: 00FF70H•D6
HZR51: 00FF70H•D7
Sets the output terminals to a high impedance state.
When "1" is written: High impedance
When "0" is written: Complementary
Reading:
HZRxx is the high impedance control register
which correspond to the Rxx output port terminal.
When "1" is set to the HZRxx register, the corre-
sponding output port terminal becomes high
impedance state and when "0" is set, it becomes
complementary output.
This control is effective even if the port is set as a
special output port.
At initial reset, this register is set to "0"
(complimentary).
∗
HZR34 is unavailable in the E0C88862.
DC output control
R26D: 00FF75H•D6
R27D: 00FF75H•D7
R34D: 00FF76H•D4 ∗
R50D: 00FF78H•D0
R51D: 00FF78H•D1
Sets the data output from the output port terminal
Rxx.
When "1" is written: HIGH level output
When "0" is written: LOW level output
Reading:
RxxD is the data register for the Rxx output port.
When "1" is set to the register, the corresponding
output port terminal goes HIGH (V
"0" is set, it goes LOW (V
At initial reset, R50D is set to "0" (LOW level
output). The other registers are set to "1" (HIGH
level output).
When R26 and/or R51 are set to the special outputs
by mask option, R26D and/or R51D can be used as
general-purpose registers that do not affect the
output status.
∗
R34D is unavailable in the E0C88862.
44
Valid
Valid
), and when
DD
).
SS
Special output control
PTOUT: 00FF30H•D2
Controls the TOUT (programmable timer output
clock) signal output.
When "1" is written: TOUT signal output ON
When "0" is written: TOUT signal output OFF
Reading:
PTOUT is the output control register for TOUT
signal. When "1" is set to the register, the TOUT
(TOUT) signal is output from the output port
terminal R27 (R26). When "0" is set, the R27 goes
HIGH (V
) and the R26 goes LOW (V
DD
To output the TOUT signal, "1" must always be set
for the data register R27D. The data register R26D
does not affect the TOUT output.
At initial reset, PTOUT is set to "0" (output OFF).
The TOUT signal can be output from R26 only
when the function is selected by mask option.
FOUTON: 00FF40H•D3 ∗
Controls the FOUT (f
signal output.
When "1" is written: FOUT signal output
When "0" is written: HIGH level (DC) output
Reading:
FOUTON is the output control register for FOUT
signal. When "1" is set, the FOUT signal is output
from the output port terminal R34 and when "0" is
set, HIGH (V
) level is output. At this time, "1"
DD
must always be set for the data register R34D.
At initial reset, FOUTON is set to "0" (HIGH level
output).
∗
In the E0C88862, FOUTON is a general purpose
register with read/write capabilities.
FOUT0, FOUT1, FOUT2: 00FF40H•D4, D5, D6 ∗
FOUT signal frequency is set as shown in Table
5.5.6.2.
Table 5.5.6.2 FOUT frequency settings
FOUT2
FOUT1
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
At initial reset, this register is set to "0" (f
∗
In the E0C88862, FOUT0, FOUT1 and FOUT2
are general purpose registers with read/write
capabilities.
EPSON
Valid
).
SS
/f
dividing clock)
OSC1
OSC3
Valid
FOUT0
FOUT frequency
0
f
/ 1
OSC1
1
f
/ 2
OSC1
0
f
/ 4
OSC1
1
f
/ 8
OSC1
0
f
/ 1
OSC3
1
f
/ 2
OSC3
0
f
/ 4
OSC3
1
f
/ 8
OSC3
f
:
OSC1 oscillation frequency
OSC1
f
:
OSC3 oscillation frequency
OSC3
OSC1
E0C88832/88862 TECHNICAL MANUAL
/1).
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