Register Updating - Hitachi HD64411 Q2 User Manual

Quick 2d graphics renderer
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5 . 2

Register Updating

External Updating: Writing to an address-mapped registers from the CPU is called external
updating.
If external updating is performed in the interval from the raster following the end of screen display
until immediately before the rise of VSYNC, a register can be rewritten without causing display
flicker.
As the VBK flag and FRM flag in the status register (SR) are set to 1 at the start of vertical
blanking, external updating can be carried out using these flags.
Figures 5-1 (a) and (b) show the external update interval.
HSYNC
Figure 5-1 (a)
124
Display area
External update interval
External Update Interval (Interlace Mode)
VBK and FRM flags
both set to 1

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