Image Data Size Registers X And Y (Idsrx, Idsry); Image Data Entry Register (Ider) - Hitachi HD64411 Q2 User Manual

5 . 7 . 2

Image Data Size Registers X and Y (IDSRX, IDSRY)

Bit: 15 14
IDSRX — —
Initial value: — —
Read/Write: — —
Bit: 15 14
IDSRY — —
Initial value: — —
Read/Write: — —
Note: * Do not write 0 to bit 0 of IDSRX (bit IDSX0).
Image data size registers X and Y (IDSRX, IDSRY) are 16-bit readable/writable registers that
specify the image data X size and Y size in pixel units when the setting of bits YUV1 and YUV0
is 01 or 10. An even number should be set for the X size (IDSX0 bit = 0).
If the value of these registers is modified during a series of data conversion operations from the
time bits YUV1 and YUV0 are set to 01 or 10 by the CPU until YUV mode is cleared
automatically by the Q2, operation will be unstable.
Bits 15 to 11 of IDSRX and bits 15 to 10 of IDSRY are reserved. Only 0 should be written to
these bits.
The values of IDSRX/Y bits IDSX and IDSY are initialized to all-0 by a reset.
5 . 7 . 3

Image Data Entry Register (IDER)

Bit: 15 14
IDE IDE
Initial value: 0 0
Read/Write: W W
The image data entry register (IDER) is a 16-bit write-only register that comprises the entry in
which image data is input when the setting of bits YUV1 and YUV0 is 01 or 10.
IDER is initialized to H'0000 by a reset.
13 12 11 10 9
— — — IDSX IDSX
— — — 0 0
— — — R/W R/W
13 12 11 10 9
— — — — IDSY
— — — — 0
— — — — R/W
13 12 11 10 9
IDE IDE IDE IDE IDE
0 0 0 0 0
W W W W W
8 7 6 5 4
IDSX IDSX IDSX IDSX IDSX
0 0 0 0 0
R/W R/W R/W R/W R/W
8 7 6 5 4
IDSY IDSY IDSY IDSY IDSY
0 0 0 0 0
R/W R/W R/W R/W R/W
8 7 6 5 4
IDE IDE IDE IDE IDE
0 0 0 0 0
W W W W W
3 2 1 0
IDSX IDSX IDSX IDSX*
0 0 0 0
R/W R/W R/W R/W
3 2 1 0
IDSY IDSY IDSY IDSY
0 0 0 0
R/W R/W R/W R/W
3 2 1 0
IDE IDE IDE IDE
0 0 0 0
W W W W
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