7 . 3 . 2
Test Load Circuit (All Output and Input/Output Pins)
Test Point
C
176
5.0V
RL
R
Input/output timing test levels (excluding CLK0 and CLK1)
Low level: 1.5 V
High level: 1.5 V
Figure 7-2
Test Load Circuit
RL = 1.8 kΩ
C = 70 PF
R = 10 kΩ
All diodes are
1S2074 H or
equivalent products.