Table 5-7. Cpn5365 Rear I/O Connector (J5) - Motorola CompactPCI CPN5365 Installation And Use Manual

Connector Pin Assignments
Table 5-6. Signal Descriptions for the Backplane Connector (J4)
Signal
EIDE (ATA-2),
Primary Channel
5
Video Signals
Pin F
22 GND
21 GND
20 GND
19 GND
5-8
Signal Signal Description
Mnemonic
PDREQ- Drive DMA request
PDACK- Drive DMA acknowledge
PIOR- Drive I/O read
PIOW- Drive I/O write
PIORDY- Indicates drive is ready for I/O cycle(s)
PD[15:0] Drive data lines, bits 15 -- 0
DRSTDRV Reset signal to drive
PCS1 Chip select drive 0, also command register block select
PCS3 Chip select drive 1, also command register block select
PA[2:0] Drive register and data port address lines
PINTRQ Drive interrupt request
PDASP Drive active
PDIAG Drive inter-communication
RED Red signal
GRN Green signal
BLU Blue Signal
HSYNC Horizontal synchronization
VSYNC Vertical synchronization
DDCCLK Display Data Channel clock signal for DDC2 support
DDCDAT Display Data Channel data signal for DDC2 support

Table 5-7. CPN5365 Rear I/O Connector (J5)

E D
SRSTDRV- SINTRQ
SCS1- SDACK-
SCS3- SIORDY
SDREQ SIOW-
C B
KBDDAT ERX0+
KBDCLK ERX0-
RESET_IN AUXVCC
MDAT ERX1+
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A
ETX0+
ETX0-
GND
ETX1+