Fujitsu DevKit16 User Manual page 46

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These switches should be used only when using the CPU board without
Mainboard, or with the FPGA disabled (see the description of J29 in the
Mainboard section).
1:MD0, 2:MD1, 3:MD2 – these switches are connected to CPU pins MD0,
MD1, MD2. In the ON position, a switch pulls the signal connected to it to log
'0'. The setting of these switches affects the mode of the processor. The
description of all the modes is in the following table:
MD2
MD1
MD0
AD00
/P00
ON
ON
ON
OFF
ON
ON
OFF
OFF
ON
OFF
ON
OFF
ON
OFF
OFF
OFF
OFF
ON
ON
OFF
ON
OFF
OFF
OFF
ON
ON
OFF
OFF
OFF
4: S-R – if ON, this switch connects the RES pin of the K7 connector to the
CPU's #RST signal.
5: S-H – if ON, this switch connects the RES pin of the K7 connector to the
CPU's #HST signal.
6. H-R – if ON, the #RST and #HST signals are connected together.
7: AD00, 8:AD01 – if ON, the AD00/P00 and AD01/P01 signals are pulled to
log. '0' level. This setting must be done for bringing processor to the Serial
programming mode.
AD01
Mode name
/P01
OFF
External vector mode 0
OFF
External vector mode 1
OFF
External vector mode 2
OFF
Internal vector mode
X
X
Reserved
X
X
Reserved
ON
Async serial programming
X
X
Reserved
44
44
44
44
Reset vector
Ext. bus
area
witdth
External
8
External
16
External
16
Internal
(Mode data)

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