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f
=384 000/CS[3:0]
SCL
The actual SCL clock frequency is dependent on the speed of devices that
are connected to the I2C bus – see the "Clock synchronization" issue in the
Philips's I2C bus specification.
(4) Data register
IDAR
7
Address: CC
D7
H
Read/Write
(R/W)
Initial Value
(X)
This register is used for serial transfer. Data is transferred from MSB. When
data is received (TRX=0) the receive shift register is directly read, so
receive data is valid only when the INT bit is set.
Data for transmitting are written directly to the transmit shift register.
K E Y B O A R D
C O N T R O L L E R
The keyboard controller provides an interface to a standard PC-AT
keyboard. When a key is pressed on the keyboard, the controller receives a
SCAN code of that key and stores it in the KBDR register. Then it generates
the interrupt INT2. The interrupt handling routine should buffer the SCAN
codes and decode them.
Base Address: EA
H
(1) Keyboard data register
KBDR
7
Address: EA
D7
H
Read/Write
R
Initial Value
(X)
(2) Keyboard control register
KBDR
7
Address: EB
---
H
Read/Write
---
Initial Value
(---)
[Bit 4] INTE: Keyboard interrupt enable
This bit enables a bus error interrupt
0: Interrupt is disabled - the INT2 pin stays in high impedance state, with a
47k pullup.
1: Interrupt is enabled – if the INTE bit is 1 and a scan code is received from
the keyboard, the INT2 interrupt is generated. occurs
6
5
4
D6
D5
D4
(R/W)
(R/W)
(R/W)
(X)
(X)
(X)
6
5
4
D6
D5
D4
R
R
R
(X)
(X)
(X)
6
5
4
---
---
INTE
---
---
R/W
(---)
(---)
(0)
70
70
70
70
3
2
1
D3
D2
D1
(R/W)
(R/W)
(R/W)
(X)
(X)
(X)
3
2
1
D3
D2
D1
R
R
R
(X)
(X)
(X)
3
2
1
---
---
---
---
---
---
(---)
(---)
(---)
0
D0
(R/W)
(X)
0
D0
R
(X)
0
---
---
(---)
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