NEC Barracuda Service Manual page 23

Pda
Table of Contents

Advertisement

Barracuda PDA Maintenance
10-BIT ADC
The UCB1300 includes a 10-bit successive approximation analog-to-digital converter (ADC) with built-in track
and hold circuit and an analog multiplexer to select one of the 4 analog inputs (AD0 - AD3), the 4 touch screen inputs
(TSPX, TSMX, TSPY, TSMY) or the pressure output of the touch screen bias circuit. The ADC is used to read-out the
touch screen inputs and it measures the voltage on the four analog high voltage inputs AD0 - AD3. The analog
multiplexer contains 4 resistive dividers to attenuate the high voltage on the AD0 - AD3 inputs to the ADC input
range.
The ADC is controlled completely through the SIB interface, but the UCB1300 contains internal logic to ease the
control of the ADC and to minimize the number of SIB frame read/write actions.
A complete ADC control sequence analog to digital conversion consists of several phases. Firstly, the ADC has to
be enabled; secondly, the input selector must be set to the proper input; thirdly, the ADC conversion has to be started;
and finally, the ADC result has to be read from register 11.
The ADC is activated by setting ADC_ENA in register 10. The ADC circuit, including the track and hold circuit
does not consume any power as long as this bit is reset. The analog input multiplexer is controlled by ADC_INPUT[n]
and the ADC is actually started with the ADC_START bit. When TSPX and TSMX are in the interrupt mode, the ADC
cannot be started, even to measure AD0-3.
The UCB1300 has two different modes to start the ADC conversion, which are selected by the
ADC_SYNC_ENA bit. The default mode is the non-synchronization mode, in which the conversion is started directly
with a 0-to-1 transition of ADC_START. Secondly the ADC is started at a rising edge of the signal applied to the
ADCSYNC pin if ADC_SYNC_ENA is set. Activating the ADC while keeping the start logic in the started state
(ADC_START = 1) will lead to unpredictable behavior and the value of the ADC data register will not be meaningful.
Always activate a start sequence for each acquisition (0-to-1 transition on the internal ADC_START signal).
22

Advertisement

Table of Contents
loading

Table of Contents