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P
ower
F
i lters
Thi s sect i on i s on schematic 25Α.
HP 8110 Α Service G
u
ide
Thi s funct io n al unit removes
n
o ise
f
rom the
p
ow er supplies . Also,
U
100
p
rovides buffer ing for serial inpu t si g nals applied to t he DBI IC
(25 Β) .
Device
B
US I
n
terface
Thi s sectio n i s on sche matic 25 Β .
This fun cti on al unit uses α DBI IC to communi cate with the
Mi cro processor . Thi s
I
C
i
s driven seriall y, bu ffered th rough U 100.
An EEPROM stores sp ecific informati on
a
b out th e
D
es ke w Board,
s u ch as i ts ser i al numb er an d calibration data.
A
t switch-o n t he
Mi cro p rocessor comp ares i ts data wit h t h is EEPROM
a
nd if
differe n ces sh ow , upl oad s data
f
rom t h e EEPRO M. In thi s w ay the
HP 8110Α
b
eco mes aw are of
c
h anges in the instr ume nt (for exampl e
α P C
B
oard ch ange) .
The DBI
o
utpu t lin es control t he del ays (25C) and are taken through
a
n al og swi tches to
p
ro vi de
E
C L conv ersion.
Delays
T
hi s sectio n i s on schem at ic 25C .
p
rovi des delay s o f up to 30ns con sistin g of
t
wo chann el s to deske w
t
he Ou t pu t
B
oards . As t he 2
D
elay p aths are iden tical , only t he
ci rcuitry for C h a nnel 1 will be describ ed.
TJ301
p
rovi des
l
e v el co nvers ion from EE CL l eve ls to
E
CL levels for
drivin g the
D
el ay ICs .
Th e
D
el ay s, U302 and
U
303 are in series in the signal lin e, bu t are
controlled toget her so that α de l ay set on
U
302
i
s also set on
U
303 .
E
ach
o
f th e
I
Cs can
b
e
p
rogrammed to give α
m
aximum delay
o
f
15 n s, g ivin g α total
m
aximu m del ay
o
f 30 ns . The D e l ays can be
p
rogrammed in b oth coarse and fin e steps.
Α
d
i fferent i al amplifier (Q301 and Q302 and associ ated components)
p
rovi des co nvers ion bac k to EEC L leve ls .
F
u
n
ctio
n
al Desc
r
i
p
tion 7-27
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