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P
ower S upply Board, 5-14
RP G Head unit, 5-24
RP G
m
odule, 5-24
$
Selftest, 4-2
Microp rocessor
B
oard, 4-2
Ou tput Board, 4-4
P
er iod
B
oard, 4-3
Sequ ence o f
o
perat ions, 5-5
Specificat ions, 2-1
CLK IN, 2-13
D
el ay, 2-9
D
es kew, 2-15
E
xternal Inpu t, 2-6
Levels, 2-11
Memor y Card, 2-7
Outpu t Modes, 2-4
Outputs, 2-10
P
eriod, 2-4
PLL, 2-13
PLL REF, 2-13
Strob e O utpu t, 2-6
Timing, 2-9
Timing (PLL), 2-13
Transition Times, 2-10
Tr igger M odes, 2-5
Trigger O utpu t, 2-7
Widt h, 2-9
Spec i fications/ Pulse P erfor mance, 2-11
Statu s Registers, 4-24
T
er ms, 5-2
T
est
A
ccessories, 3-2
T
est Equipm ent li st, 3-2
T
est ing, 3-1
T
est
R
ecords, 3-53
T
ests
D
elay, 3-16
D
elay Ji tter, 3-33
D
ouble Pulse
D
elay , 3-20
High
a
nd Lo w Levels, 3-35
High Level, 1Κ
O
hms into 50 O hms, 3-39
High L evel, 50 Ohms into 50 O hms, 3-36
Ji tter, 3-24
Leading Edge, 3-44
L ow L evel, 1Κ
O
hms into 50 O hm s, 3-41
Low Level, 50 Ohms into 50 Ohms, 3-38
Min. Leading edge
f
or Level Windo w
>
f 5V, 3-48
Min.
T
railin g edge
f
or Level Window
>
f5V , 3-49
O vershoot and Ringin g, 3-51
P
er iod, 3-7
P
er iod Jitter-In ternal Oscillator, 3-24
P
er i od Ji tter-Internal PLL (if fitted), 3-27
PLL Per iod, 3-10
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