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HP 8110 Α Se
r
vice Gui
d
e
Device
BU
S Interface
This sect i o n i s on schemati c 6Β .
Delay Ge
n
e
r
ato
r
Thi s secti on i s on schematic 6D .
7- 30
F
u
n
ctio
n
al Descri
p
tio
n
The ad
j
u st DA C,
U
73, consists of 8 DACs t h at receive EEPRO M
data
f
rom
t
h e Mi croprocessor to
p
rovi de ad
j
ustment voltages
f
or t he
slo p e
p
erforman ce, overs hoot, and o utput
p
ower limiting. These
voltages are in the range +3 V to -3 V .
Thi s fun ct i onal uni t u ses α DBI I C to communi cate with the
Mi cro p rocessor. Thi s
I
C
i
s driven ser ially, buffered through U 53.
An EEPRO M stores s p ec ific inform at ion
a
b out t he O ut put Board,
s uc h as i ts seri al numb er and calib rat ion data. At switch-on the
Mi cro p rocessor comp ares its data with t hi s EEPROM and if
differen ces sh ow , uploads data fro m the EEPRO M. In thi s way the
HP 8110 Α
b
ecomes aware of c han ges in th e instr ument (for exampl e
α
P
C Board cha nge) .
U54 extends th e addressing capabili ty
o
f t he interface.
D
el ay i s
p
rodu ced by α TIG ER I C op erat ing as α
m
on ostable flipflop.
The TIGER IC i s co n tro lled by current . Th e greater the curre nt,
t h e sh orter th e delay per iod. The current source is divi ded into
2 secti on s, α lo w
c
urrent path
a
nd α hig h
c
urrent
p
ath. Th e
l
o w
c
u rre n t p at h pro vi des 10%ο o f t hat provi ded by the high
c
urrent
p
ath .
Cont
r
ol
Control i s
p
rovided by α
D
-Α converter,
U
102. To obtain t he correct
rel atio n s hip b et ween t he digital control data and t he curre nt
n
eeded
f
or contro lling t he TI G ER I C, the DA C mu st o perate in 1/χ
m
ode .
In stead o f a pplying
f
eedback to pin 16 on
U
102, i t is applied to
pin 15, prod u cin g th e 1/χ p er formance. Pin 16 is given α vo ltage
reference via
U
1000 .
Th e out put o f t h e DA C is applied to
U
100 B whi ch i s connected
to th e so u rce o f Q100 . C urrent flowing t hrough Q100
i
s mi rrored
t hro u gh Q101, p roviding the hi gh-c urre nt
p
ath. Q103 acts in the
sam e way, exce pt th at choice of resistor
R
124 limits c urrent flo w to
10% of t he c urre n t t h rough Q101, thus
p
rovi ding the
l
ow-c urren t
p
ath .
The lo w-cu rrent
p
at h is permane nt ly connected to the TIGER I C
an d t he high-cu rre n t
p
ath is switched by U 155
b
et ween 0 V and t he
TIG ER,
d
ep en d in g on the requi red delay range.
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