Signal Width Specifications - Motorola MC68340 User Manual

Integrated processor with dma
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Additionally, the relationship between the asynchronous inputs and the clock edge, as
shown in Figure 10-11, does not change as frequency changes.
A second type of specification indicates the minimum amount of time a signal will be
asserted. This type of specification is illustrated in Figure 10-12.
CLKOUT
OUTPUT
The method for calculating a frequency-adjusted t w is as follows:
where:
t w ' = the frequency-adjusted signal width
t w = the signal width at 16.78 MHz
N = the number of full one-half clock periods in t w
T f '/2 = one-half the new clock period
T f /2 = one-half the clock period at full speed
t d = the propagation time from the clock edge
The following calculation uses a 16.78-MHz part, specification 14, AS width asserted, at
12.5 MHz as an example:
t w = 100 ns
N = 3
T f '/2 = 80/2 = 40 ns
T f /2 = 60/2 = 30 ns
t d = 30 ns maximum
therefore:
The third type of specification used is a skew between two outputs (see Figure 10-13).
10-8
Freescale Semiconductor, Inc.
T/2
t d
Figure 10-12. Signal Width Specifications
t w ' = t w + N (T f '/2 – T f /2) + (T f '/2 – t d )
t w ' = 100 + 3(40 – 30) + (40 – 30) = 140 ns
MC68340 USER'S MANUAL
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N
t w
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