Shift/Rotate Instructions - Motorola MC68340 User Manual

Integrated processor with dma
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5.7.3.9 SHIFT/ROTATE INSTRUCTIONS. The shift/rotate instruction table indicates the
number of clock periods needed for the processor to perform the specified operation on
the given addressing mode. Footnotes indicate when to account for the appropriate EA
times. The number of bits shifted does not affect the execution time, unless noted. The
total number of clock cycles is outside the parentheses. The numbers inside parentheses
(r/p/w) are included in the total clock cycle number. All timing data assumes two-clock
reads and writes.
LSd
Dn, Dm
LSd
#, Dm
LSd
FEA
ASd
Dn, Dm
ASd
#, Dm
ASd
FEA
ROd
Dn, Dm
ROd
#, Dm
ROd
FEA
ROXd
Dn, Dm
ROXd
#, Dm
ROXd
FEA
d = Direction (left or right)
NOTES:
1. Head and cycle times can be derived from the following table or calculated as follows:
Max (3
(n/4)
2. Head and cycle times are calculated as follows: (count
3. Head and cycle times are calculated as follows: (count
Clocks
6
0
8
7
10
15
12
23
14
31
16
39
18
47
20
55
22
63
5-108
Freescale Semiconductor, Inc.
Instruction
mod(n,4)
mod (((n/4)
mod (n,4)
1
2
3
10
11
13
18
19
21
26
27
29
34
35
37
42
43
45
50
51
53
58
59
61
MC68340 USER'S MANUAL
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Go to: www.freescale.com
Head
Tail
2
0
4
0
0
2
2
0
4
0
0
2
2
0
4
0
0
2
2
0
2
0
0
2
1,2), 6)
63): max (3
n
mod (n
8): max (2
n
mod (n,2), 6).
Shift Counts
4
5
6
14
16
17
22
24
25
30
32
33
38
40
41
46
48
49
54
56
57
62
Cycles
Note
(0/1/0)
1
6(0/1/0)
6(0/1/1)
(0/1/0)
1
6(0/1/0)
6(0/1/1)
(0/1/0)
1
6(0/1/0)
6(0/1/1)
(0/1/0)
2
(0/1/0)
3
6(0/1/1)
1,2), 6).
8
9
12
20
28
36
44
52
60
MOTOROLA

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