Chapter 1 Outline; Features - NEC 78K0 User Manual

1.1 Features

Minimum instruction execution time can be changed from high speed (0.2
input clock) to ultra low-speed (122
General-purpose registers: 8 bits × 32 registers (8 bits × 8 registers × 4 banks)
ROM, RAM capacities
Part Number
µ
PD780111
µ
PD780112
µ
PD780113
µ
PD780114
µ
PD78F0114
Note The internal flash memory and internal high-speed RAM capacities can be changed using the internal
memory size switching register (IMS).
On-chip power-on-clear (POC) circuit and low-voltage detector (LVI)
Short startup is possible via the CPU default start using the on-chip Ring-OSC
On-chip clock monitor function using on-chip Ring-OSC
On-chip watchdog timer (operable with Ring-OSC clock)
On-chip key interrupt function
I/O ports: 32 (N-ch open drain: 4)
Timer: 7 channels
Serial interface: 3 channels
(UART (LIN (Local Interconnect Network)-bus supported): 1 channel, CSI/UART
10-bit resolution A/D converter: 8 channels
Supply voltage: V
DD
V
DD
Operating ambient temperature: T
Note Select either of the functions of these alternate-function pins.

CHAPTER 1 OUTLINE

µ
s: @ 32.768 kHz operation with subsystem clock)
Item Program Memory
(ROM)
Mask ROM 8 KB
16 KB
24 KB
32 KB
Flash memory 32 KB
= 2.7 to 5.5 V (standard product, (A) grade product)
= 3.3 to 5.5 V ((A1) grade product, (A2) grade product)
= −40 to +85°C (standard product, (A) grade product)
A
= −40 to +105°C (flash memory version of (A1) grade product)
T
A
= −40 to +110°C (mask ROM version of (A1) grade product)
T
A
= −40 to +125°C (mask ROM version of (A2) grade product)
T
A
User's Manual U16227EJ2V0UD
µ
(Internal High-Speed RAM)
512 bytes
1024 bytes
Note Note
1024 bytes
s: @ 10 MHz operation with X1
Data Memory
Note
: 1 channel)
17