NEC 78K0 User Manual page 191

(2) Timing chart
The operation timing in PWM output mode is shown below.
Caution Make sure that the CMP1n register setting value (M) and CMP0n register setting value (N) are
within the following range.
00H ≤ CMP1n (M) < CMP0n (N) ≤ FFH
Remark n = 0, 1
Count clock
8-bit timer counter Hn 00H 01H
CMP0n
CMP1n
TMHEn
INTTMHn
TOHn
(TOLEVn = 0)
<1>
TOHn
(TOLEVn = 1)
<1> The count operation is enabled by setting the TMHEn bit to 1. Start 8-bit timer counter Hn by masking one
count clock to count up. At this time, TOHn output remains inactive (when TOLEVn = 0).
<2> When the values of 8-bit timer counter Hn and the CMP0n register match, the TOHn output level is inverted,
the value of 8-bit timer counter Hn is cleared, and the INTTMHn signal is output.
<3> When the values of 8-bit timer counter Hn and the CMP1n register match, the level of the TOHn output is
returned. At this time, the 8-bit timer counter value is not cleared and the INTTMHn signal is not output.
<4> Clearing the TMHEn bit to 0 during timer Hn operation makes the INTTMHn signal and TOHn output inactive.
Remark n = 0, 1
CHAPTER 8 8-BIT TIMERS H0 AND H1
Figure 8-12. Operation Timing in PWM Output Mode (1/4)
(a) Basic operation
A5H 00H 01H 02H
<2>
User's Manual U16227EJ2V0UD
A5H 00H 01H 02H
A5H
01H
<3>
A5H 00H
<4>
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