Toshiba GRT100 Series Instruction Manual page 126

6.5.1.6 Definite time overcurrent elements OC, EF
The testing circuit is shown in Figure 6.5.10.
Single-phase
current
source

DC
power

supply
Figure 6.5.10 Testing OC and EF (Model 100s, 200s)
Element
1OC, 2OC, 3OC
1EF, 2EF, 3EF
The testing procedure is as follows:
 Press 4 (= Logic circuit) on the "Test" sub-menu screen to display the "Logic circuit" screen.
 Enter a signal number to observe the OC or EF output at monitoring jack A and press the
ENTER key.
 Apply a test current and change the magnitude of the current applied and measure the value at
which the element operates.
Check that the measured value is within 5% of the theoretical operating value..
Theoretical operating value = (CT secondary rated current) × (OC or EF setting)
A
Signal number
47, 53, 59
72, 75, 78
 125 
6 F 2 S 0 7 8 9
GRT100
TB 1
-1
I a
- 2
- 7
I N
- 8
A
Monitoring
jack
0V
TB 4
- A16
- A17
E