Toshiba TXZ+ Series Reference Manual page 45

Bit Bit Symbol
8 IPENB08
7 IPENB07
6 IPENB06
5 IPENB05
4 IPENB04
3 IPENB03
2 IPENB02
1 IPENB01
0 IPENB00
Note1: Even if the initial value of a register is set to stop of the clock, the clock is supplied to the register during
the reset.
Note2: Please write "0" into the unavailable register bits in the TMPM3HP, TMPM3HM, TMPM3HN, and
TMPM3HL. For detail, refer to "1.5. Information according to product".
After
Type
reset
0: Clock stop
1: Clock supply
Enable the Clock of UART channel3
0 R/W 0: Clock stop
1: Clock supply
Enable the Clock of UART channel2
0 R/W 0: Clock stop
1: Clock supply
Enable the Clock of UART channel1
0 R/W 0: Clock stop
1: Clock supply
Enable the Clock of UART channel0
0 R/W 0: Clock stop
1: Clock supply
Enable the Clock of TSPI channel4
0 R/W 0: Clock stop
1: Clock supply
Enable the Clock of TSPI channel3
0 R/W 0: Clock stop
1: Clock supply
Enable the Clock of TSPI channel2
0 R/W 0: Clock stop
1: Clock supply
Enable the Clock of TSPI channel1
0 R/W 0: Clock stop
1: Clock supply
Enable the Clock of TSPI channel0
0 R/W 0: Clock stop
1: Clock supply
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TMPM3H Group(1)
Clock Control and Operation Mode
Function
TXZ+ Family
2022-05-10
Rev. 1.3