Connection Table; Code Area/ Sram Area - Toshiba TXZ+ Series Reference Manual

2.2.2. Connection table

2.2.2.1. Code area/ SRAM area

(1) Single chip mode
Start Address
0x00000000
0x00080000
0x20000000
0x20004000
0x20008000
0x20010000
0x20010800
0x22000000
0x24000000
0x30000000
0x30008000
0x3F7F8000
0x3F7F9800
0x5E000000
: Accessible, -: No access, Fault: Fault occurred
(2) Single boot mode
Start Address
0x00000000
0x00001800
0x20000000
0x20004000
0x20008000
0x20010000
0x20010800
0x22000000
0x24000000
0x30000000
0x30008000
0x3F7F8000
0x3F7F9800
0x5E000000
: Accessible, -: No access, Fault: Fault occurred
Table 2.1 Single chip mode
Slave
M0
Code Flash
M1
Fault -
RAM0 M4
RAM1 M5
RAM2 M6
Backup RAM M7
Fault -
Bit band alias -
Fault -
Data Flash M3
Fault -
Boot ROM
M8
(Mirror)
Fault -
For the address of this area, refer to the "Table 2.3 Peripheral area".
Code Flash
M2
(Mirror)
Table 2.2 Single boot mode
Slave
Boot ROM M8
Fault -
RAM0 M4
RAM1 M5
RAM2 M6
Backup RAM M7
Fault -
Bit band alias -
Fault -
Data Flash M3
Fault -
Boot ROM
M8
(Mirror)
Fault -
For the address of this area, refer to the "Table 2.3 Peripheral area"
Code Flash
M2
(Mirror)
Clock Control and Operation Mode
Master
DMAC DMAC
(Unit A) (Unit B) S-Bus
S0 S1
Fault Fault
Fault Fault
Fault Fault
 
 
 
Fault Fault
Fault Fault
Fault Fault
Fault Fault
 
Fault Fault
Fault Fault
Fault Fault
 
Master
DMAC DMAC
(Unit A) (Unit B) S-Bus
S0 S1
Fault Fault
Fault Fault
 
 
 
Fault Fault
Fault Fault
Fault Fault
Fault Fault
 
Fault Fault
Fault Fault
Fault Fault
 
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TMPM3H Group(1)
Core Core Core
D-Bus I-Bus
S2 S3
- Fault

- Fault
- Fault Fault

-

-

-

-
Fault -

-
Fault -

-
Fault -

-
Fault -

-
Core Core Core
D-Bus I-Bus
S2 S3

-
- Fault Fault

-

-

-

-
Fault -

-
Fault -

-
Fault -

-
Fault -

-
TXZ+ Family
S4

-
-
-
-
-
-
-
-
-
-
-
-
S4

-
-
-
-
-
-
-
-
-
-
-
-
2022-05-10
Rev. 1.3