Motorola DSP56012 User Manual page 243

Mnemonic
MAC (+)S2,S1,D
(+)S1,S2,D
(+)S,#n,D
MACR (+)S2,S1,D
(+)S1,S2,D
(+)S,#n,D
MOVE S,D
No parallel data move
Immediate short
data move
Register to register
data move
Address register update
X memory data move
Register and X memory
data move
Y memory data move
- indicates that the bit is unaffected by the operation
* indicates that the bit may be set according to the definition, depending on parallel move conditions
? indicates that the bit is set according to a special definition; see the instruction descriptions in Appendix A of
the DSP56000 Family Manual (DSP56KFAMUM/AD)
0 indicates that the bit is cleared
MOTOROLA
Table B-3 Instruction Set Summary (Sheet 4 of 7)
Syntax Parallel Moves
(parallel move)
(parallel move)
(no parallel move)
(parallel move)
(parallel move)
(no parallel move)
(.....)
(.....)#xx,D
(.....)S,D
(.....)ea
(.....)X:<ea>,D
(.....)X:<aa>,D
(.....)S,X:<ea>
(.....)S,X:<aa>
(.....)#xxxxxx,D
(.....)X:<ea>,D1
(.....)S1,X:<ea>
(.....)#xxxxxx,D1
(.....)A,X:<ea>
(.....)B,X:<ea>
(.....)Y:<ea>,D
(.....)Y:<aa>,D
(.....)S,Y:<ea>
(.....)S,Y:<aa>
(.....)#xxxxxx,D
DSP56012 User's Manual
Programming Reference
Instruction
Program
Words
1+mv
1
1+mv
1
1+mv
mv
mv
mv
mv
mv
S2,D2 mv
S2,D2
S2,D2
X0,A
X0,B
mv
Osc. Status Request
Clock Bits:
Cycles
S L E U N Z V C
2+mv * * * * * * * -
2
2+mv * * * * * * * -
2
2+mv * * - - - - - -
mv - - - - - - - -
mv - - - - - - - -
mv * * - - - - - -
mv - - - - - - - -
mv * * - - - - - -
mv * * - - - - - -
mv * * - - - - - -
B-11