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Programming Reference
Application:
HI
Transmit Data Register Empty (TXDE)
0 = HOREQ deasserted/1 = HOREQ asserted
B-22
Processor Side
Receive Data Register Full (RXDF)
0 = wait/1 = read
0 = wait/1 = write
Transmitter Ready (TRDY)
0 = data in HI/1 = data not in HOST8
Host Flags (HF3, HF2)
Read Only
DMA Status (DMA)
0 = DMA disabled/1 = DMA enabled
Host Request (HOREQ)
Interrupt Status Register (ISR)
Interrupt Vector Register (IVR)
DSP56012 User's Manual
Date:
Programmer:
7
6
HOREQ
DMA
$2 Read/Write
Reset = $06
* = Reserved, write as 0
Interrupt Status Register (ISR)
Interrupt Vector Number For Use By MC68000
Processor Family Vectored Interrupts.
7
6
IV7
IV6
$3 Read/Write
Reset = $0F
* = Reserved, write as 0
Interrupt Vector Register (IVR)
Sheet 4 of 5
5
4
3
2
1
0
HF3
HF2
TRDY
TXDE
RXDF
*
0
5
4
3
2
1
0
IV5
IV4
IV3
IV2
IV1
IV0
MOTOROLA
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