Motorola DSP56012 User Manual page 244

Programming Reference
Mnemonic
Register and Y memory
data move
Long memory data move
XY memory data move
MOVE(C) X:<ea>,D1
X:<aa>,D1
S1,X:<ea>
S1,X:<aa>
Y:<ea>,D1
Y:<aa>,D1
S1,Y:<ea>
S1,Y:<aa>
S1,D2
S2,D1
#xxxx,D1
#xx,D1
MOVE(M) P:<ea>,D
S,P:<ea>
S,P:<aa>
P:<aa>,D
MOVE(P) X:<pp>,D
X:<pp>,X:<ea>
- indicates that the bit is unaffected by the operation
* indicates that the bit may be set according to the definition, depending on parallel move conditions
? indicates that the bit is set according to a special definition; see the instruction descriptions in Appendix A of
the DSP56000 Family Manual (DSP56KFAMUM/AD)
0 indicates that the bit is cleared
B-12
Table B-3 Instruction Set Summary (Sheet 5 of 7)
Syntax Parallel Moves
(.....)S1,D1
(.....)S1,D1
(.....)S1,D1
(.....)Y0,A
(.....)Y0,B
(.....)L:<ea>,D
(.....)L:<aa>,D
(.....)S,L:<ea>
(.....)S,L:<aa>
(.....)X:<eax>,D1
(.....)X:<eax>,D1
(.....)S1,X:<eax>
(.....)S1,X:<eax>
DSP56012 User's Manual
Instruction
Program
Words
Y:<ea>,D2 mv
S2,Y:<ea>
#xxxxxx,D2
A,Y:<ea>
B,Y:<ea>
mv
Y:<eay>,D2 mv
S2,Y:<eay>
Y:<eay>,D2
S2,Y:<eay>
1+ea
1+ea
1+ea
Osc. Status Request
Clock Bits:
Cycles
S L E U N Z V C
mv * * - - - - - -
mv * * - - - - - -
mv * * - - - - - -
2+mvc ? ? ? ? ? ? ? ?
2+mvm ? ? ? ? ? ? ? ?
2+mvp ? ? ? ? ? ? ? ?
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