Link Data Specifications; Table 2-3 Registers Available For Common Memory Area Allocation In Lpu Memory; Table 2-4 Virtual Address Space And Physical Memory - Hitachi FL.NET User Manual

2 FL.NET MODULE

2.1.3 Link data specifications

(1) Common memory area
The FL.NET module allows you to set up a common memory area for each node.
For the common memory area setup procedure, see "5.3.1 Link parameter setup
procedure." For the procedure for reserving a common memory area in the LPU's memory,
see "5.3.2 LPU memory allocation procedure."

Table 2-3 Registers Available for Common Memory Area Allocation in LPU Memory

No. Available register/address
1 XW000 to XWFF0
2 YW000 to YWFF0
3 JW000 to JWFF0
4 QW000 to QWFF0
5 GW000 to GWFF0
6 RW000 to RWFF0
7 EW400 to EWFF0
8 MW000 to MWFF0
9 DW000 to DWFFF
10 FW000 to FWBFF
11 LBW0000 to LBWFFF0
12 LWW0000 to LWWFFFF
13 LXW0000 to LXW3FFF
(2) Virtual address space and physical memory

Table 2-4 Virtual Address Space and Physical Memory

Item
Area name
Access unit
Area size
Access attribute
Correspondence to virtual
address (word block) (*)
Data arrangement
Other access method
(*) To support the correspondence to virtual addresses, a byte block is not supported.
External input
External output
Transfer register
Receive register
Global link register
Internal register
Event register
Internal register
Function data register
Function work register
Work register
Word work register
Word work register
Memory address (0x000000 to 0xFFFFFF)
Word
16,777,216 bytes
Read/Write
Conditions: A write operation cannot be performed on some ROM
areas and OS areas.
Vendor-unique notation
0x000000, 0x000001
0x000002, 0x000003
0xFFFFFE, 0xFFFFFF
A 2-byte area corresponds to one word of a word block.
MSB
Address n
Nothing in particular
2-4
Remarks
Description
Virtual address
0x00000000
0x00000001
0x007FFFFF
Address n + 1
LSB