Toshiba Aplio SSA-770A Service Manual page 148

No. 2D730-148E*O
<<Circuit functions>>
Functional Block Major Function
Back Plane CNN
Connector with APL10 main unit
PCI-PCI Bridge IP board is connected with Aplio via PCI bus. There is PCI-PCI
Bridge on IP board for separate PCI bus inside IP board.
PCI-LOCAL Bridge The Interface device between IP board internal PCI bus and Local
bus.
LOCAL SRAM 1 The working RAM for PCI-Local bridge device
BOOT ROM
DIMM memory for data capture
IP board information is stored in this ROM.
The memory to capture IQ data or IM data in real time
512 MB DIMM memory
Temporary data storage memory
(DIMM)
Temporary data memory; data taken from the above DIMM memory
512 MB DIMM memory
DATA INPUT IQ data/lM data input buffer (only Buffer)
FPGA Capture memory, Temporary storage memory Read/Write control,
DIMM initialization, Refresh function, Interrupt function
CONFIG ROM 1 Configuration ROM for FPGA
CLOCK DRIVER IP board basic clock generator (33 MHz oscillator)
Making 66 MHz from 33 MHz (40 MHz from BE)
PWB RESET IP board local reset
DIP SW Several hardware settings: Do not change the original settings
SIO : for PCI-Local Bridge device IC initial setting
s4 : for PMC interrupt
S5 : for PCI/PMC (future use) settings
s7
: for FPGA settings
s9
: for FPGA ROM/SDRAM settings
S6
: for PROM FPGA JTAG settings
S2/S3 : for Clock driver settings
Sl
: board Reset
UXSI 1 : FPGA configuration switch
Power supply circuit I3.3v 2.5v 5v
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