Mitsubishi Electric MELSEC Q Series User Manual page 392

Device
ER (extended file register)
B
W
Q/QnA link special relay
(within Q/QnACPU)
Retentive timer (contact)
Retentive timer (coil)
Q/QnA link special register
(within Q/QnACPU)
Q/QnA edge relay
(within Q/QnACPU)
Own station random access
buffer
Retentive timer (current
value)
Own station link register
(for sending)
Own station link register
(for receiving)
Own station buffer memory
Q/QnA SEND function
(with arrival confirmation)
Q/QnA SEND function
(no arrival confirmation)
Direct link input
(Other station side)
Direct link output
(Other station side)
Direct link relay
(Other station side)
Direct link register
(Other station side)
Direct link special relay
(Other station side)
Direct link special register
(Other station side)
Special direct buffer
register,
Intelligent function module
buffer memory
CPU shared memory
Other station buffer
*8
memory
390
Device type
Access
(Device name
method
specification)
DevER(0) to
DevER(256)
DevB
DevW
DevQSB
DevSTT
DevSTC
DevQSW
DevQV
DevMRB
DevSTN
DevWw
DevWr
Batch/
Random DevSPB
DevMAIL
DevMAILNC
DevLX(1) to
DevLX(255)
DevLY(1) to DevLY(255)
DevLB(1) to
DevLB(255)
DevLW(1) to
DevLW(255)
DevLSB(1) to
DevLSB(255)
DevLSW(1) to
DevLSW(255)
DevSPG(0) to
DevSPG(255)
Batch DevSPB1
(for CPU No.1),
DevSPB2
(for CPU No.2),
DevSPB3
(for CPU No.3),
Random
DevSPB4
(for CPU No.4)
Batch
DevRBM
Random
Access target
1) 2) 3) 4)
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
: Accessible : Inaccessible
5) 6) 7) 8)
*
 5  

*6*7
  

*6*7
  

   
   
   
   
*2



*2
 

*2
 


*2



*2
 

*2
 

*2
  

   



*1
9)









