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Section 11
Testing functionality by secondary injection
11.6.5.5
Final adjustment of compensation for VT ratio differences
Procedure
1.
With the protection in test mode, view the differential voltage service values in each phase on
the local HMI under Main menu /Test /Function status /Voltage protection /
VoltageDiff(PTOV,60) /VDCPTOV:x .
2.
Record the differential voltages.
3.
Calculate the compensation factor RFLx for each phase.
For information about calculation of the compensation factor, see the application manual.
4.
Set the compensation factors on the local HMI under Main menu /Settings /Settings group
N /Voltage protection /VoltageDiff(PTOV,60) /VDCPTOV:x
5.
Check that the differential voltages are close to zero.
11.6.5.6
Completing the test
Continue to test another function or end the test by changing the TESTMODE setting to Off. Restore
connections and settings to the original values, if changed for testing purposes.
11.6.6
Loss of voltage check LOVPTUV
Prepare the IED for verification of settings as outlined in section
section
11.6.6.1
Measuring the operate limit of set values
1.
Check that the input logical signals BLOCK, CBOPEN and VTSU are logical zero.
2.
Supply a three-phase rated voltage in all three phases and note on the local HMI that the TRIP
logical signal is equal to the logical 0.
3.
Switch off the voltage in all three phases.
After set tTrip time a TRIP signal appears on the corresponding binary output or on the local
HMI.
4.
Inject the measured voltages at rated values for at least set tRestore time.
5.
Activate the CBOPEN binary input.
6.
Simultaneously disconnect all the three-phase voltages from the IED.
No TRIP signal should appear.
7.
Inject the measured voltages at rated values for at least set tRestore time.
8.
Activate the VTSU binary input.
9.
Simultaneously disconnect all the three-phase voltages from the IED.
No TRIP signal should appear.
10.
Reset the VTSU binary input.
11.
Inject the measured voltages at rated values for at least set tRestore time.
12.
Activate the BLOCK binary input.
13.
Simultaneously disconnect all the three-phase voltages from the IED.
No TRIP signal should appear.
14.
Reset the BLOCK binary input.
202
The IED voltage inputs should be connected to the VTs according to valid
connection diagram.
"Preparing for test"
in this chapter.
Note that TRIP at this time is a pulse signal, duration should be according to set
tPulse.
© 2017 - 2022 Hitachi Energy. All rights reserved
1MRK 504 165-UEN Rev. K
"Requirements"
and
Transformer protection RET670
Commissioning manual
SEMOD175258-183 v2
SEMOD175258-208 v2
SEMOD175023-3 v5
SEMOD175023-7 v7
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