Completing The Test; Current Reversal And Weak-End Infeed Logic For Residual Overcurrent Protection Ecrwpsch; Testing The Current Reversal Logic - Hitachi RET670 Commissioning Manual

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1MRK 504 165-UEN Rev. K
1.
Inject the polarizing voltage 3U0, which is 5% of UBase (EF4PTOC) where the current is
lagging the voltage by 65°.
2.
Inject current (65° lagging the voltage) into one phase at about 110% of the set operating
current, and switch the current off with the switch.
3.
Switch the fault current on, (110% of the set operating current) and wait longer than the set
value tCoord.
4.
Switch the fault current off.
5.
Activate the CR binary input.
6.
Switch the fault current on (110% of the set operating current) and measure the operating time
of the ECPSCH logic.
Use the TRIP signal from the configured binary output to stop the timer.
7.
Compare the measured time with the setting for tCoord.
8.
Activate the BLOCK digital input.
9.
Switch the fault current on (110% of the set operating current) and wait for a period longer than
the set value tCoord.
10.
Switch the fault current and the polarizing voltage off.
11.
Reset the CR binary input and the BLOCK digital input.
11.12.4.3

Completing the test

Continue to test another function or end the test by changing the TESTMODE setting to Off. Restore
connections and settings to the original values, if changed for testing purposes.
11.12.5
Current reversal and weak-end infeed logic for residual
overcurrent protection ECRWPSCH
Prepare the IED for verification of settings as outlined in section
"Preparing for test"
Values of the logical signals for ECRWPSCH are available on the Local HMI under Main menu/Tests/
Function status/Scheme communication/ECRWPSCH(85)/ECRWPSCH:1.
The Signal Monitoring in PCM600 shows service values that are available on the Local HMI as well.
First, test the four step residual overcurrent protection function EF4PTOC and then the current
reversal and weak-end infeed logic according to the corresponding instructions. Then continue with
the instructions below.
11.12.5.1

Testing the current reversal logic

1.
Inject the polarizing voltage 3U0 to 5% of UBase and the phase angle between voltage and
current to 155°, the current leads the voltage.
2.
Inject current (180° — AngleRCA) in one phase to about 110% of the set operating current of
the four step residual overcurrent protection (IN>Dir).
3.
Check that the IRVL output is activated in the disturbance recorder after the set time
tPickUpRev.
Transformer protection RET670
Commissioning manual
No TRIP signal should appear, and the CS binary output should be activated.
No TRIP signal should appear.
in this chapter.
© 2017 - 2022 Hitachi Energy. All rights reserved
Testing functionality by secondary injection
"Requirements"
and section
Section 11
M13926-71 v5
M13936-2 v8
M13936-9 v7
257

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