Completing The Test; Voltage Unbalance Protection Of Shunt Capacitor Bank, Scuvptov; Verifying The Signals And Settings - Hitachi RET670 Commissioning Manual

1MRK 504 165-UEN Rev. K
Step no.
4-h
- Steps 4–f, 4–g and 4–h can also be done phase wise.
* - UBase is considered as 400 kV and VT ratio as 400 kV/110 V
The voltage inputs U
** - This step should be done only during Factory Acceptance Test (FAT). At field, the testing should be done with
the stored field values.
To calculate PUDIFL1 in steps 4-f, 4-g and 4-h, use the following equations:
IECEQUATION19128 V1 EN-US
IECEQUATION19129 V1 EN-US
11.7.3.2

Completing the test

Continue to test another function or end the test by navigating to Main menu/Test/IED test mode/
TESTMODE: 1 and change the IEDTestMode setting to Off. Restore connections and settings to
their original values, if they were changed for testing purposes.
11.7.4 Voltage unbalance protection of shunt capacitor bank,
SCUVPTOV
Prepare the IED for verification of settings outlined in
11.7.4.1

Verifying the signals and settings

Ensure that mandatory three-phase and neutral voltages are connected to the separate SMAI blocks
and their outputs are connected to the U3P and U3NEUT inputs of the SCUVPTOV function.
1. Set the following parameters:
•
•
•
Transformer protection RET670
Commissioning manual
Changes after step 2
Inject U = 31.00 V in secondary at rated
TapL1
frequency
, U , and U
L1 L2
1
 
  
UDIFL 1 U U
L 1 N
USEDURATL
UDIFL 1
= ´
PUDIFL 1 100
UBase 3
The SCPDPTOV function will be blocked if any one of the phase bus voltage or all
three tap voltages equivalent to bus voltage (UTAPLx/USEDURATLx) goes below
the UMin> setting.
Operation = ON
tDefTrip = 5.00 s; tDefAlm = 5.00 s; tDefWrn = 5.00 s
UNUnbal> = 5.5% UBase
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refer to the bus voltages and U
L3
 
 
U U
TapL 1 N
1
Section
Testing functionality by secondary injection
Expected output
• STARTBFI_3P and STL1 signals should
become HIGH after a time delay given by
the setting tDefTrip
• TRIP and TRL1 signals should become
HIGH, if BlockTrip is set to Trip enabled
• PUDIFL1 should show 11.22%
refers to the tap voltage of phase L1.
TapL1
GUID-FEA7B2D1-3F4A-43FD-98F8-EC3584E5B511 v1
GUID-C41B59C8-9CA0-4B5F-9F90-354804BC1449 v1
GUID-CEB4E17E-DBDC-4201-BDC2-043E6F73BCD6 v1
10.1.2.
GUID-562427DE-2ADB-47DC-9E67-96626887C32F v1
GUID-3A4104C3-B362-44E2-B84E-1790D47B07FE v1
Section 11
(Equation 114)
(Equation 115)
215