Completing The Test; Phase Voltage Differential Based Capacitor Bank Unbalanced Protection, Scpdptov; Verifying The Signals And Settings - Hitachi RET670 Commissioning Manual

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1MRK 504 165-UEN Rev. K
Step No.
4-c
* - CT ratios of the phase currents (1000/1 A) and unbalance currents (10/1 A). The values of IB1 and IB2 are
considered as 1000 A and 10 A, respectively. The current inputs I
inputs and I
** - Step 4 can also be done phase wise.
To calculate IREFUNBL1 in
IREFUNBL1
IECEQUATION19378 V1 EN-US
To calculate IUNBCLCL1 in
IUNBCLCL1 IUNBL1 IREFUNBL1
IECEQUATION19377 V1 EN-US
11.7.2.2

Completing the test

Continue to test another function or end the test by changing the TESTMODE setting to Off. Restore
connections and settings to the original values, if changed for testing purposes.
11.7.3
Phase voltage differential based capacitor bank unbalanced
protection, SCPDPTOV
Prepare the IED for verification of settings outlined in Section
11.7.3.1

Verifying the signals and settings

Operation modes
The SCPDPTOV function requires the inputs from both bus and tap voltage transformers to operate.
The SCPDPTOV function can be operated in two different modes based on the physical connection
and configuration of the capacitor bank.
Grounded - Select this option by using the parameter setting SCBGndType, if the capacitor bank
is grounded.
Ungrounded - Select this option by using the parameter setting SCBGndType, if the capacitor
bank is ungrounded.
Transformer protection RET670
Commissioning manual
Changes after step 3
Change I
= 0.55∠0° A, Change
UNBL1
I
= 0.55∠0° A, and Change I
UNBL2
= 0.55∠0° A
, I
, and I
UNBL1
UNBL2
UNBL3
Step
3-c, use the following equation:
IL1
=
´
IMEMUNBL1
IMEML1
Step
4, use the following equation:
=
-
The measured unbalance current is referred with respect to its reference current.
Refer Technical manual for more information about unbalance current calculation.
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Expected output
START, STL1, STL2, and STL3 signals should
become HIGH
UNBL3
TRIP, TRL1, TRL2, and TRL3 should become
HIGH after the set time delay, ifBlockTrip is set to
Trip enabled
IUNBL1, IUNBL2, and IUNBL3 should show 5.5 A
IUNBCLCL1, IUNBCLCL2, and IUNBCLCL3 should
show 3.5 A which is equivalent to 35% of IBase2
L1
refers to the unbalance current inputs.
"Preparing the IED to verify
Testing functionality by secondary injection
, I
, and I
, refer to the phase current
L2
L3
GUID-157C6A26-3126-4203-BEF9-4B816DD6EAA6 v1
GUID-6B483CCF-DC5C-4106-AE7B-D801893E9475 v1
GUID-EB2024D9-129E-4F95-9280-E62F40123422 v1
GUID-F31C0DAF-FD59-4EC1-92CF-56CC805640C5 v1
Section 11
(Equation 108)
(Equation 109)
settings".
209

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