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17.3.3 FEEDER

iR5065 / iR 5055 / iR5075 / / /
Address
bit
Description
P003
0
DDIS serial communication (TxD)
1
ADF serial communication (TxD)
2
DDIS serial communication (RxD)
3
ADF serial communication (RxD)
4
LED control
5
ADF serial communication (SCK)
6-7
not used
P004
0
original size detection 0
1
original size detection 1
2
original size detection 2
3
original size detection 3
4
DF connection detection
5
DDIS IF (SRTS)
6
scanner motor Vref output
7
not used
P005
0
PC connection IF (TxD)
1
PC connection IF (RxD)
2
fan lock detection signal
3
DDIS IF (SCTS)
4-7
not used
P006
0
not used
1
PCB check terminal
2
DDIS IF (OPTI1)
3
DDIS IF (OPTO1)
4
ADF sensor interrupt input
5
platen cover open/closed sensor interrupt input 0
6
HP sensor interrupt input
7
not used
P007
0
address bus 16
1
address bus 17
2
address bus 18
3-4
not used
5
ADF pickup motor clock interrupt input
6
ADF read motor clock interrupt input
7
ADF reversal motor clock interrupt input
P008
0
lamp ON signal
1
CCD drive ON signal
2
wait signal
3
L light signal
4
H light signal
5
read signal
6
ADF serial communication (LOAD)
7
CPU click output
P009
0
not used
1
shading RAM chip select
2
work RAM chip select
3
ASIC register chip select
4
ROM chip select
5-7
not used
Address
bit
Description
P001
0
read sensor
1
registration sensor
2
delivery reversal sensor
3
ADF cover open/closed sensor
4-7
not used
Remarks
1: ON
0: original present
0: original present
0: original present
0: original present
0: permit reception
0: enable
0: permit reception
1: normal
0: active
0: active
0: active
1: cover open
1: HP
1: ON
1: ON
0: wait
0: active
0: active
0: active
0: enable
0: select
0: select
0: select
0: select
T-17-13
Remarks
0: paper present
1: paper present
0: paper present
0: ADF open
Chapter 17
0015-5829
17-11

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