Notes On Mixing Sparc64 X+ Processors With Sparc64 X Processors; Notes And Restrictions On The Sr-Iov Functions - Fujitsu M10 Product Notes

performed, not only the DR processing will terminate abnormally, Oracle Solaris
on a running physical partition may hang, hardware failure may occur, physical
partitions may stop abnormally and replacement of parts may become necessary.
If even one logical domain in the OpenBoot PROM state is situated in the physical
■
partition, dynamically reconfiguring the physical partition causes it to end with an
error.
Execute dynamic reconfiguration of the physical partition after changing the
logical domain to any of the following states: state where Oracle Solaris is
running, bound state, or inactive state.
Do not specify either "unbind=resource" or "unbind=shutdown" at the "-m" option
■
of the deleteboard(8) command when executing dynamic reconfiguration of
physical partitions where the version of Oracle VM Server for SPARC is earlier
than 3.2, as there is a chance of the logical domain to hang or the deleteboard(8)
command to fail.
Due to this problem, memory module (DIMM) of different capacities cannot be
mounted on a chassis, which is the target of the dynamic reconfiguration of
physical partitions. Make sure that the mounted memory modules (DIMMs) on
chassis whose physical partition is the target of dynamic reconfiguration, are all of
the same capacity.
Meanwhile, there is no problem if the number of DIMMs differs from chassis to
chassis.
Do not apply patches 150400-01 to 150400-06 on Oracle Solaris 10. In such a case,
■
dynamic reconfiguration of physical partitions may cause system panic (CR
17510986).
Notes on mixing SPARC64 X+ processors with
SPARC64 X processors
To mix SPARC64 X+ processors with SPARC64 X processors, configure each type in a
unit of the SPARC M10 system chassis, which is the system board configuration unit.
SPARC64 X+ processors cannot be mixed with SPARC64 X processors and mounted
together inside each chassis in the SPARC M10 system. In the SPARC M10-4/M10-4S,
there are systems configured with the CPU memory unit lower (CMUL) and CPU
memory unit upper (CMUU). These units must have the same processor.

Notes and restrictions on the SR-IOV functions

Notes
If the maintenance of PCI Express (PCIe) cards that use the SR-IOV function is
■
performed either with dynamic reconfiguration (DR) of physical partitions or with
PCI hot plugging (PHP), execute the following procedure beforehand:
1. Remove all virtual functions (VF) from the I/O domains by executing the "ldm
remove-io" command.
Chapter 2 XCP 2240-Related Information 13