Design and method of operation of the S5-95U with DP master interface
Operating
This illustration shows the principle of data exchange as implemented in the
principle
S5-95U.
DP master: S5-95U
Control
processor
Application program
Outputs
Inputs
PLC cycle
Figure 4-2
Principle of data exchange between S5-95U and DP slave
PLC cycle
The application program writes the output data into the appropriate address
space of the S5-95U .
The exchange of data between the control processor and the control processor
takes place at the cycle checkpoint of the S5-95U.
At the cycle checkpoint, the communication processor copies:
The input data can be processed in the application program .
DP cycle
The S5-95U receives data from the DP slaves. This data is written to the
receive buffer of the communication processor . At the same time, the
output data is sent to the DP slaves .
The exchange of data between the DP master and DP slaves takes place
cyclically and is independent of the cycle checkpoint of the S5-95U.
ET 200 Distributed I/O System
EWA 4NEB 780 6000-02a
Communication
processor
Send buffer
SINEC L2-DP
Receive
buffer
the output data from the address space to its send buffer
and simultaneously
the input data to the corresponding address space of the S5-95U .
DP slave: e. g. ET 200B
Address spaces:
Inputs
Outputs
DP cycle
4
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