Table of Contents
Advertisement
Table of Contents
Chapter 1
Signal/ Connection Descriptions
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.1
2.2
2.3
2.4
2.5
2.6
2.7
3.1
3.2
3.3
4.1
4.2
4.3
4.4
Ordering Information, Disclaimer, and Contact Information .................................................................. Back Cover
Data Sheet Conventions
OVERBAR
Used to indicate a signal that is active when pulled low (For example, the RESET pin is active when
low.)
"asserted"
Means that a high true (active high) signal is high or that a low true (active low) signal is low
"deasserted"
Means that a high true (active high) signal is low or that a low true (active low) signal is high
Examples:
Note: Values for V
, V
IL
ii
MSC8101 Features............................................................................................................................................. iii
Target Applications ............................................................................................................................................ iv
Product Documentation...................................................................................................................................... iv
Signal Groupings.............................................................................................................................................. 1-1
Power Signals................................................................................................................................................... 1-4
Clock Signals ................................................................................................................................................... 1-5
Reset, Configuration, and EOnCE Event Signals ............................................................................................ 1-6
System Bus, HDI16, and Interrupt Signals ...................................................................................................... 1-8
Memory Controller Signals............................................................................................................................ 1-16
Communications Processor Module (CPM) Ports ......................................................................................... 1-18
JTAG Test Access Port Signals...................................................................................................................... 1-45
Reserved Signals ............................................................................................................................................ 1-46
Introduction ...................................................................................................................................................... 2-1
Absolute Maximum Ratings ............................................................................................................................ 2-1
Recommended Operating Conditions .............................................................................................................. 2-2
Thermal Characteristics ................................................................................................................................... 2-2
DC Electrical Characteristics ........................................................................................................................... 2-3
Clock Configuration......................................................................................................................................... 2-4
AC Timings ...................................................................................................................................................... 2-7
Pin-Out and Package Information .................................................................................................................... 3-1
FC-PBGA Package Description ....................................................................................................................... 3-1
FC-PBGA Package Mechanical Drawing...................................................................................................... 3-32
Thermal Design Considerations....................................................................................................................... 4-1
Electrical Design Considerations ..................................................................................................................... 4-2
Power Considerations....................................................................................................................................... 4-2
Layout Practices ............................................................................................................................................... 4-4
Signal/Symbol
PIN
PIN
PIN
PIN
, V
, and V
are defined by individual product specifications.
OL
IH
OH
Logic State
Signal State
True
Asserted
False
Deasserted
True
Asserted
False
Deasserted
Voltage
V
/V
IL
OL
V
/V
IH
OH
V
/V
IH
OH
V
/V
IL
OL
Advertisement
Table of Contents
