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Name
General-
Peripheral Controller:
Purpose
Dedicated I/O
I/O
Protocol
PC4
SMC1: SMRXD
SI2: L1ST4
FCC2: CD
HDLC serial , HDLC nibble ,
and transparent
Communications Processor Module (CPM) Ports
Table 1-5. Port C Signals (Continued)
Dedicated
I/O Data
Direction
Input
SMC1: Receive Data
Supported by SMC1. The SMC interface consists of SMTXD,
SMRXD, SMSYN, and a clock. Not all signals are used for all
applications. SMCs are full-duplex ports that supports three
protocols or modes: UART, transparent, or general-circuit
interface (GCI).
Output
Serial Interface 2: Layer 1 Strobe 4
In the time-slot assigner supported by SI2. The MSC8101
time-slot assigner supports up to four strobe outputs that can
be asserted on a bit or byte basis. The strobe outputs are
useful for interfacing to other devices that do not support the
multiplexed interface or for enabling/disabling three-state I/O
buffers in a multiple-transmitter architecture. These strobes
can also generate output wave forms for such applications as
stepper-motor control.
Input
FCC2: Carrier Detect
In the standard modem interface signals supported by FCC2
(RTS, CTS and CD). CD is asynchronous with the data.
Description
1-41
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