Mitsubishi Electric MELSEC iQ-R Series User Manual page 187

High speed digital-analog converter module
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CH1 Offset/gain setting mode (range specification)
Normal
The output range can be changed in the offset/gain setting.
The output range is changed to the set one by 'Channel change request' (YB).
Setting value
EH
FH
When a value other than the above is set, an offset/gain setting range error (error code: 1E9H) occurs.
■Buffer memory address
The following shows the buffer memory address of this area.
Buffer memory name
CH Offset/gain setting mode (range specification)
■Enabling the setting
Turn on 'Channel change request' (YB).
■Default value
The default value is 0H for all channels.
CH1 Synchronization digital value
Synchronization
In the inter-module synchronization mode, set the digital value in 16-bit signed binary for the D/A conversion from the CPU
module. A digital value set in this area is D/A-converted at the timing of inter-module synchronization cycle, and then output in
analog at the timing of next inter-module synchronization cycle.
Output range
4 to 20mA
0 to 20mA
1 to 5V
0 to 5V
-10 to 10V
User range setting (voltage)
User range setting (current)
When a value out of the available setting range is written, the D/A conversion is performed with the upper or lower limit value
of the available setting range. A check code is stored in 'CH1 Set value check code' (Un\G400) and a digital value setting
range error (error code: 191H) is stored in 'Latest error code' (Un\G0).
■Buffer memory address
The following shows the buffer memory address of this area.
Buffer memory name
CH Synchronization digital value
■Default value
The default value is 0 for all channels.
Description
User range setting (voltage)
User range setting (current)
CH1
CH2
4164
4165
Setting range (practical range)
-768 to 32767
(practical range: 0 to 32000)
-32768 to 32767
(practical range: -32000 to 32000)
CH1
CH2
9500
9502
CH3
CH4
4166
4167
CH3
CH4
9504
9506
APPX
Appendix 3 Buffer Memory Areas
A
185

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