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(24) Receive LOH mode register (MDLOHR)
The MDLOHR register sets the modes related to receive LOH operation.
Register
Name
Port0:
MDLOHR
0078 H
31
30
29
28
15
14
13
12
Bit
Field
D31-
D4
Reserved
Set to 0.
LRDIDT
D3
Changes "n" of the Line RDI detection condition Line RDI is detected when a frame
with K2 byte (bits 6 to 8) being "110" has been received n times."
LAISDT
D2
Changes "n" of the Line AIS detection condition Line AIS is detected when a frame
with the K2 byte (bits 6 to 8) set to "111" has been received n times."
D1
B2M
Selects even or odd parity for BIP-96 (B2) parity operation of receive line.
D0
M1M
Controls if ignored of the bit1 in the received M1 bytes when detect the Line REI.
CHAPTER 5 REGISTERS
Address
Port1:
Port2:
Port3:
0478 H
0878 H
0C78 H
27
26
25
24
Reserved
11
10
9
8
Reserved
1: n = 5
0: n = 3
1: n = 5
0: n = 3
1: Odd parity
0: Even parity
1: Ignored
0: Not ignored
PRELIMINARY
Access
Default
R/W
0000000C H
23
22
21
20
7
6
5
4
LRDIDT LAISDT
Function
19
18
17
16
3
2
1
0
B2M
M1M
Default
0
1
1
0
0
NEC confidential and Proprietary
195
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