NEC UPD98413 User Manual page 6

3.5.2 Drop Register
3.6 Transmission/Reception of J0/J1 Trace Message
3.6.1 Transmitting Trace Message
3.6.2 Receiving Trace Message
3.7 Transmitting Pseudo Frame for Testing
3.8 Loopback Function
CHAPTER 4 INTERFACES
4.1 Line Interface
4.2 ATM Interface
4.2.1 Signals
4.2.2 Cell Formats
4.2.3 Transmit operation
4.2.4 Receive operation
4.2.5 Parity
4.2.6 ATM Interface Error Detection
4.3 POS Interface
4.3.1 Signals
4.3.2 Packet Formats
4.3.3 Transmit operation
4.3.4 Receive operation
4.3.5 Parity
4.3.6 POS Interface Error Detection
4.4 Overhead Insert/Extract Interfaces and Section/Line DCC Insert/Extract Interface
4.4.1 OH Insert Interface
4.4.2 OH Extract Interfaces
4.4.3 Transmit Section and Line DCC Insert Interface
4.4.4 Receive Section and Line DCC Extract Interface
4.5 Frame Pulse input pins
4.6 General-Purpose Input and Output Ports
4.7 Alarm Insertion / Detection Pins
4.7.1 Alarm Insertion Pins
4.7.2 Alarm Detection Pins
4.8 Management Interface
4.8.1 Endian
4.8.2 Access timing
4.8.3 Interrupt
CHAPTER 5 REGISTERS
5.1 Register Map
5.2 Register summary
5.3 Function of Registers
CHAPTER 6 JTAG BOUNDARY SCAN
6.1 Features
6.2 Internal Configuration of Boundary Scan Circuit
6.2.1 Instruction Register
6
PRELIMINARY
100
101
101
104
110
111
111
111
116
116
119
120
123
127
127
129
129
133
134
135
138
138
140
141
144
145
145
146
147
148
148
148
149
149
150
152
159
160
166
169
305
305
307
307