2.2.3 Management Interface
The management interface is used to access the registers of the
Pin Name
Serial No.
MCLK
AD31-0
CS_B
UWE_B
R/W_B
RDY_B
INT_B
26
CHAPTER 2 PIN FUNCTION
Address No.
I/O Level
I
LVTTL
I/O
LVTTL
I
LVTTL
I
LVTTL
I
LVTTL
O
3-state
LVTTL
O
LVTTL
PRELIMINARY
µ
PD98413.
Function
Microprocessor bus Clock
This pin Input microprocessor bus Clock.
All read and write operations in the Management interface are
executed in synchronization with this clock signal.
Address / data bus
The AD31 to AD0 bus is a 32-bit, bi-directional,
multiplexed address/data bus. During the first clock of a
transaction, AD31 to AD0 contains a physical byte
address. During subsequent clocks, AD31 to AD0 contains
µ
data. When the
PD98413 is not accessing the bus, it
places the AD bus in the high impedance state.
I/O chip select signal
When this signal is low, access to the internal registers of
µ
the
PD98413 is enabled.
Upper word enable signal
Read / write select signal
Ready signal
Interrupt Output
The INT_B output is used to inform the CPU that an
(unmasked) interrupt bit was set in the INT.
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