6.2.2
TAP (Test Access Port) Controller
6.2.3
Bypass Register
6.2.4
Boundary Scan Register
6.3
Pin Function
6.3.1
JCK (JTAG Clock) Pin
6.3.2
JMS (JTAG Mode Select) Pin
6.3.3
JDI (JTAG Data Input) Pin
6.3.4
JDO (JTAG Data Output) Pin
6.3.5
JRST_B (JTAG Reset) Pin
6.4
Operation Description
6.4.1
TAP Controller
6.4.2
TAP Controller State
6.5
TAP Controller Operation
6.6
Initializing TAP Controller
6.7
Instruction Register
6.7.1
BYPASS Instruction
6.7.2
EXTEST Instruction
6.7.3
SAMPLE/PRELOAD Instruction
6.7.4
Boundary Scan Data Bit Definition
PRELIMINARY
307
307
307
308
308
308
308
308
308
309
309
309
314
317
317
318
318
318
318
7