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These bits are cleared by hardware reset.
13.3.2 Edge Port Data Direction Register (EPDDR)
The 16-bit read/write edge port data direction register (EPDDR) controls the direction
of the port pins. Setting any bit in this register configures the corresponding pin as an
output. Clearing any bit in this register configures the corresponding pin as an input.
Pin direction is independent of the level/edge mode programmed.
EPDDR — Edge Port Data Direction Register
15
14
13
12
R
0
0
0
0
W
RESET:
Figure 13-3 Edge Port Data Direction Register
EPDDx — Edge Port Data Direction x
0 = Pin INT x is an input.
1 = Pin INTx is an output.
These bits are cleared by reset.
13.3.3 Edge Port Data Register (EPDR)
The edge port data register (EPDR) is a 16-bit register. Writes to EPDR are stored in
an internal latch, and if any pin of the port is configured as an output, the data stored
for that bit is driven onto the pin. Reads of this register return the value sensed on the
pins for those pins configured as inputs, or the data stored in the register for the pins
configured as outputs.
EPDR — Edge Port Data Register
15
14
13
12
R
0
0
0
0
W
RESET:
X = Unaffected by reset
MMC2001
REFERENCE MANUAL
Freescale Semiconductor, Inc.
Table 13-2 EPPAx Field Settings
Value
00
Pin INTx defined as level sensitive
01
Pin INTx defined as rising edge detect
10
Pin INTx defined as falling edge detect
Pin INTx defined as both falling and rising
11
edge detect
11
10
9
8
0
0
0
0
11
10
9
8
0
0
0
0
Figure 13-4 Edge Port Data Register
EXTERNAL INTERRUPTS/GPIO (EDGE PORT)
For More Information On This Product,
Go to: www.freescale.com
Meaning
7
6
5
4
EPDD7 EPDD6 EPDD5 EPDD4 EPDD3 EPDD2 EPDD1 EPDD0
0
0
0
0
7
6
5
4
EPD7 EPD6 EPD5 EPD4 EPD3 EPD2 EPD1 EPD0
X
X
X
X
10007002
3
2
1
0
0
0
0
0
10007004
3
2
1
0
X
X
X
X
MOTOROLA
13-3
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