Data Port Size Field Settings - Motorola M-CORE MMC2001 Series Reference Manual

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OEA — OE Assert
This bit determines when OE is asserted during a read cycle. If WSC=0000, this bit is
ignored and OE is asserted for one half of a clock cycle only. If EBC in the corre-
sponding register is cleared, then the EB[0:1] outputs are similarly affected.
0 = OE is asserted normally, i.e., as early as possible.
1 = OE is asserted one half of a clock cycle later during a read cycle to this chip
select address space. The cycle length and write cycles are not affected.
WEN — EB Negate
This bit is used to determine when EB[0:1] outputs are negated during a write cycle.
This is useful to meet data hold time requirements for slow memories. If WSC=0000,
this bit is ignored and EB[0:1] outputs are asserted for one half of a clock cycle only.
0 = EB[0:1] are negated normally, i.e., as late as possible.
1 = EB[0:1] are negated one half of a clock cycle earlier during a write cycle to
this chip select address space. The cycle length and read cycles are not
affected.
EBC — Enable Byte Control
This bit is used to indicate which access types are allowed to assert the enable byte
outputs (EB[0:1]).
0 = Read and write accesses are both allowed to assert the EB[0:1] outputs,
thus configuring them as byte enables.
1 = Only write accesses are allowed to assert the EB[0:1] outputs, thus configur-
ing them as byte write enables. The EB[0:1] outputs must be configured as
byte write enables for accesses to dual x8 memories.
DSZ — Data Port Size
This field defines the width of the device data port.
SP — Supervisor Protect
This bit is used to restrict accesses to the address range defined by the correspond-
ing chip select if the access is attempted in the user mode of CPU operation.
0 = User mode accesses are allowed in this chip select address range.
1 = User mode accesses are prohibited. An attempted access to an address
mapped by this chip select in user mode will result in a TEA to the CPU and
no assertion of the chip select output.
MOTOROLA
7-10
Freescale Semiconductor, Inc.
Table 7-5 Data Port Size Field Settings
Value
00
8-bit port, resides on DATA[15:8] pins
01
8-bit port, resides on DATA[7:0] pins
10
16-bit port
11
Reserved
EXTERNAL INTERFACE MODULE
For More Information On This Product,
Go to: www.freescale.com
Meaning
MMC2001
REFERENCE MANUAL

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