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KDSC — Key Depress Synchronizer Clear
The key depress synchronizer is cleared by writing a logic one into this bit. Reads
return a value of zero.
KPKR — Keypad Key Release
0 = No key release detected
1 = All keys have been released
KPKR is cleared by writing a logic one into this bit.
KPKD — Keypad Key Depress
0 = No key presses detected
1 = A key has been depressed
KPKD is cleared by writing a logic one into this bit.
C.4.3 Keypad Data Direction Register (KDDR)
The bits in the keypad data direction register (KDDR) control the direction of the key-
pad port pins.
The KDDR register is byte or halfword addressable.
KDDR — Keypad Data Direction Register
15
14
13
12
R
KCDD7 KCDD6 KCDD5 KCDD4 KCDD3 KCDD2 KCDD1 KCDD0 KRDD7 KRDD6 KRDD5 KRDD4 KRDD3 KRDD2 KRDD1 KRDD0
W
RESET:
0
0
0
0
KCDDx — Keypad Column x Data Direction
0 = COLx pin is configured as input.
1 = COLx pin is configured as output.
KRDDx — Keypad Row x Data Direction
0 = ROWx pin is configured as input.
1 = ROWx pin is configured as output.
C.4.4 Keypad Data Register (KPDR)
The 16-bit keypad data register is used to access the column and row data. Data writ-
ten to this register is stored in an internal latch, and for each pin configured as an out-
put, the stored data is driven onto the pin. A read of this register returns the value on
the pin for those bits configured as inputs. Otherwise, the value read is the value
stored in the register.
The KPDR register is byte or halfword addressable.
MMC2001
REFERENCE MANUAL
Freescale Semiconductor, Inc.
11
10
9
0
0
0
Figure C-19 Keypad Data Direction Register
PROGRAMMING REFERENCE
For More Information On This Product,
Go to: www.freescale.com
8
7
6
5
0
0
0
0
10003004
4
3
2
1
0
0
0
0
MOTOROLA
C-15
0
0
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