Memory Breakpoint Control Field Settings - Motorola M-CORE MMC2001 Series Reference Manual

FRZC — Freeze Control
This control bit is used in conjunction with memory breakpoint B registers to select
between asserting a breakpoint condition when a memory breakpoint B occurs, or
freezing the PC FIFO from further updates when memory breakpoint B occurs while
allowing the CPU to continue execution. The PC FIFO remains frozen until the FRZO
bit in the OSR is cleared.
0 = Memory breakpoint B occurrence causes assertion of a breakpoint condition
1 = Memory breakpoint B occurrence causes a freeze of PC FIFO from further
updates and no breakpoint assertion
RCB, RCA — Memory Breakpoint B, A Range Control
These control bits condition enabled memory breakpoints. They condition whether
memory breakpoint matches will occur when a memory address falls either within the
range defined by memory base address and mask, or outside the range.
0 = Condition breakpoint on access within range
1 = Condition breakpoint on access outside of range
BCB, BCA — Memory Breakpoint B, A Control
These control bits enable memory breakpoints and qualify the access attributes to
select whether the breakpoint match will be recognized for read, write, or instruction
fetch (program space) accesses. These bits are cleared on test logic reset. See Table
16-3 for the definition of the BCA and BCB fields.
Table 16-3 Memory Breakpoint Control Field Settings
BC4 BC3 BC2
0 0 0
0 0 0
0 0 0
0 0 0
0 0 1
0 0 1
0 0 1
0 0 1
0 1 x
1 0 0
1 0 0
1 0 0
1 0 0
1 0 1
1 0 1
1 0 1
1 0 1
1 1 0
1 1 0
1 1 0
1 1 0
1 1 1
1 1 1
1 1 1
1 1 1
MOTOROLA
16-10
Freescale Semiconductor, Inc.
BC1 BC0
0 0
0 1
1 0
1 1
0 0 Qualify match with any change of flow instruction access
0 1
1 0
1 1
x x
0 0
0 1
1 0
1 1
0 0 Qualify match with any user change of flow access
0 1
1 0
1 1
0 0
0 1
1 0 Qualify match with any supervisor instruction access
1 1
0 0 Qualify match with any supervisor change of flow access
0 1
1 0
1 1
OnCE™ DEBUG MODULE
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Description
Breakpoint disabled
Qualify match with any access
Qualify match with any instruction access
Qualify match with any data access
Qualify match with any data write
Qualify match with any data read
Reserved
Reserved
Reserved
Qualify match with any user access
Qualify match with any user instruction access
Qualify match with any user data access
Qualify match with any user data write
Qualify match with any user data read
Reserved
Reserved
Qualify match with any supervisor access
Qualify match with any supervisor data access
Qualify match with any supervisor data write
Qualify match with any supervisor data read
Reserved
MMC2001
REFERENCE MANUAL