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Table 2-1 M•CORE Instruction Set (Continued)
Mnemonic
CLRF
CLRT
CMPHS
CMPLT
CMPLTI
CMPNE
CMPNEI
DECF
DECGT
DECLT
DECNE
DECT
DIVS
DIVU
DOZE
FF1
INCF
INCT
IXH
IXW
JMP
JMPI
JSR
JSRI
LD.[BHW]
LDM
LDQ
LOOPT
LRW
LSL, LSR
LSLC, LSRC
LSLI, LSRI
MFCR
MOV
MOVI
MOVF
MOVT
MTCR
MULT
MVC
MVCV
NOT
OR
ROTLI
RSUB
RSUBI
RTE
RFI
MMC2001
REFERENCE MANUAL
Freescale Semiconductor, Inc.
Clear Register on Condition False
Clear Register on Condition True
Compare Higher or Same
Compare Less Than
Compare Less Than Immediate
Compare Not Equal
Compare Not Equal Immediate
Decrement on Condition False
Decrement Register and Set Condition if Result Greater Than Zero
Decrement Register and Set Condition if Result Less Than Zero
Decrement Register and Set Condition if Result Not Equal to Zero
Decrement on Condition True
Divide Signed Integer
Divide Unsigned Integer
Doze
Find First One
Increment on Condition False
Increment on Condition True
Index Halfword
Index Word
Jump
Jump Indirect
Jump to Subroutine
Jump to Subroutine Indirect
Load
Load Multiple Registers
Load Register Quadrant
Decrement with C-Bit Update and Branch if Condition True
Load Relative Word
Logical Shift Left and Right
Logical Shift Left and Right, Update C Bit
Logical Shift Left and Right by Immediate
Move from Control Register
Move
Move Immediate
Move on Condition False
Move on Condition True
Move to Control Register
Multiply
Move C Bit to Register
Move Inverted C Bit to Register
Logical Complement
Logical Inclusive-OR
Rotate Left by Immediate
Reverse Subtract
Reverse Subtract Immediate
Return from Exception
Return from Interrupt
INTEGER CPU
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Description
MOTOROLA
2-7
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