HP 5501A Operating And Service Manual page 113

Figure 3-14 is a block diagram of the comparator card. The heart of the comparator is a 28-bit
parallel subtracter with a built-in null decoder for the upper 24 bits. This circuit receives from
the I/O card a 28-bit digital representation of the object's destination along one axis and stores
this information. It also receives and stores a four-bit tolerance code representing the degree
of precision required in positioning the object.
Inabuctic
Control
Synchronous Sample
Backplane A d d n u
Backplane Command
Opention CMnpiate
Tolerance Btts
nd
Output Drlver
I
h h n n
I
and Nuti
or Up/ Down
PUIM Clrcultl
and Hyaternla
Figure 3-74. 707624 Comparator Block Diagram
The act of loading the tolerance register and the destination register causes the digital output
to be forced to a null or zero difference regardless of the actual difference. This prevents the
servo stage from taking off in some uncontrolled manner a s soon a s the destination register
of the first comparator is loaded, and allows time for the comparators associated with the
other axes to be loaded before allowing the system to move. However, this does not prevent
the subtracter from working. As soon as the destination register is loaded, the comparator
card begins to calculate the difference between the contents of a 28-bit-wide up/down counter
and the contents of the destination register. The difference appears at the input of the output-
driver/null-decoders.
To start the system moving, either a synchronous sample command or an addressed sample
instruction can be given. In addition to taking the present contents of the up/down counter
and loading
it
into the comparator's output buffer, these commands release the forced null
that was applied to the null decoder when the destination register was loaded. The digital
difference in sign and magnitude form then appears at the output of the comparator and i s
sent to the external D/A converter.
Under the influence of the drive voltage from the D/A converter the object begins to move
toward the desired location. This movement is sensed by the laser transducer and translated
by the pulse converter into up or down pulses. Fed into the comparator, these pulses cause
the contents of the up/down counter to change in a direction that brings
it
closer to the value
stored in the destination register. As this happens the digital difference between the desired
location and the actual position is continuously fed out to the D/A converter to drive the ob-
ject closer to the desired location. When the upper 24 bits of the up/down counter agree with
the upper 24 bits of the destination register, the output of a four-bit comparator comparing
the lower four bits of the difference output to the four-bit tolerance in the tolerance register
is examined. When the difference output is within the tolerance a null signal is issued both to
the outside world and to the coupler backplane. This null is wired on the backplane with the
same output from other comparators. This system null goes true only when all axes in the
system have achieved their desired locations within their individual tolerances. For additional
information and schematics, refer to the 10762A Comparator Operating and Service Manual.