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SBYCR—Standby Control Register
Bit
:
SSBY
Initial value
:
R/W
:
R/W
Software standby
0 When the SLEEP command is executed in high-speed or medium-speed modes,
the operation enters sleep mode.
When the SLEEP command is executed in sub-active mode, the operation enters
sub-sleep mode.
1 When the SLEEP command is executed in high-speed and medium-speed modes,
operation enters software standby mode, sub-active mode, and watch mode.
When the SLEEP command is executed in sub-active mode, operation enters
watch mode and high-speed mode.
1022
7
6
STS2
STS1
0
0
R/W
R/W
Standby timer select 2 to 0
STS2 STS1 STS0
0
1
H'FDE4
5
4
STS0
OPE
0
0
R/W
R/W
Output port enable
0 In software standby mode, watch mode, and
during direct transfer, the address bus and bus
control signal are in the high-impedance state.
1 In software standby mode, watch mode, and
during direct transfer, the address bus and bus
control signal remain in the output state.
0
0
Hold time: 8192 states
1
Hold time: 16384 states
1
0
Hold time: 32768 states
1
Hold time: 65536 states
0
0
Hold time: 131072 states
Hold time: 262144 states
1
Reserved
1
0
Hold time: 16 states
1
3
2
—
1
0
—
System
1
0
—
—
0
0
—
—
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