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Hitachi H8S/2633 Hardware Manual page 667

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Table 16-13 SCI Interrupt Sources
Interrupt
Channel
Source
0
ERI
RXI
TXI
TEI
1
ERI
RXI
TXI
TEI
2
ERI
RXI
TXI
TEI
3
ERI
RXI
TXI
TEI
4
ERI
RXI
TXI
TEI
Note: * This table shows the initial state immediately after a reset. Relative priorities among
channels can be changed by means of the interrupt controller.
Description
Interrupt due to receive error (ORER, FER,
or PER)
Interrupt due to receive data full state
(RDRF)
Interrupt due to transmit data empty state
(TDRE)
Interrupt due to transmission end (TEND)
Interrupt due to receive error (ORER, FER,
or PER)
Interrupt due to receive data full state
(RDRF)
Interrupt due to transmit data empty state
(TDRE)
Interrupt due to transmission end (TEND)
Interrupt due to receive error (ORER, FER,
or PER)
Interrupt due to receive data full state
(RDRF)
Interrupt due to transmit data empty state
(TDRE)
Interrupt due to transmission end (TEND)
Interrupt due to receive error (ORER, FER,
or PER)
Interrupt due to receive data full state
(RDRF)
Interrupt due to transmit data empty state
(TDRE)
Interrupt due to transmission end (TEND)
Interrupt due to receive error (ORER, FER,
or PER)
Interrupt due to receive data full state
(RDRF)
Interrupt due to transmit data empty state
(TDRE)
Interrupt due to transmission end (TEND)
DTC
DMAC
Activation
Activation
Not possible Not possible High
Possible
Possible
Possible
Possible
Not possible Not possible
Not possible Not possible
Possible
Possible
Possible
Possible
Not possible Not possible
Not possible Not possible
Possible
Not possible
Possible
Not possible
Not possible Not possible
Not possible Not possible
Possible
Not possible
Possible
Not possible
Not possible Not possible
Not possible Not possible
Possible
Not possible
Possible
Not possible
Not possible Not possible Low
Priority*
649

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