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8.5.5
Single Address Mode
Single address mode can only be specified for channel B. This mode can be specified by setting
the SAE bit in DMABCR to 1 in short address mode.
One address is specified by MAR, and the other is set automatically to the data transfer
acknowledge pin (DACK). The transfer direction can be specified by the DTDIR in DMACR.
Table 8-9 summarizes register functions in single address mode.
Table 8-9
Register Functions in Single Address Mode
Register
23
MAR
DACK pin
15
ETCR
Legend
MAR
: Memory address register
IOAR : I/O address register
ETCR : Transfer count register
DTDIR : Data transfer direction bit
DACK : Data transfer acknowledge
Note: * See the operation descriptions in sections 8.5.2, Sequential Mode, 8.5.3, Idle Mode, and
8.5.4, Repeat Mode.
MAR specifies the start address of the transfer source or transfer destination as 24 bits.
IOAR is invalid; in its place the strobe for external devices (DACK) is output.
252
Function
DTDIR = 0 DTDIR = 1 Initial Setting
0
Source
Destination
address
address
register
register
Write
Read
strobe
strobe
0
Transfer counter
Start address of
transfer destination
or transfer source
(Set automatically
by SAE bit; IOAR is
invalid)
Number of transfers *
Operation
*
Strobe for external
device
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